1. Field of the Invention
The present invention relates to a current addition type D/A converter.
2. Description of the Related Art
A cellular phone set based on a CDMA communication system sends an analog signal converted by a D/A converter from a digital signal subjected to spreading/modulation.
The performance required of a D/A converter is determined by, for example, IMT2000, a worldwide unified standard for mobile communications. For example, the standard specifies the number of gradations of a D/A converter and the range of a maximum allowable conversion rate when digital data is converted to an analog signal, etc.
When extremely fast D/A conversion is required, a current addition type (flash type) D/A converter is used. A current addition type D/A converter is a type of converter that generates a current corresponding to an input digital signal, flows the current into a current/voltage conversion resistor and thereby obtains voltage output corresponding to the input value.
Suppose a digital signal input to the current addition type D/A converter takes 256 values. Also suppose 256 reference current sources are provided in response to the input value. Then, according to xe2x80x9c1xe2x80x9d and xe2x80x9c0xe2x80x9d of the input bits, switching ON/OFF of the reference current sources corresponding to the input bits is controlled. A/D conversion is implemented by adding up currents output from ON-state reference current sources and converting the total current to a voltage.
In a current addition type D/A converter, a predetermined amount of current flows constantly through multiple reference current sources. This involves a problem that it is difficult to reduce power consumption.
However, it is not possible to reduce currents themselves generated by the reference current sources, either. This is because reducing the amount of current of each reference current source itself reduces the D/A conversion rate, failing to satisfy the predetermined standard.
On the other hand, for a mobile communication apparatus such as a cellular phone, reduction of power consumption of the apparatus is a stringent requirement. This involves a problem that if power consumed by the D/A converter increases too much, its power consumption does not meet the power consumption standard for the cellular phone. Another problem with the conventional addition type D/A converter is that it forces peripheral circuits to reduce power consumption excessively.
The present invention has been implemented to solve such problems and it is an object of the present invention to effectively suppress the amount of power consumption of a D/A converter.
The D/A converter of the present invention has a circuit configuration to reduce power consumption.
The performance of a D/A converter specified by a standard is naturally based on the premise that conversion output will be obtained within a predetermined time regardless of the type of input. That is, the standard specifies the highest performance.
As the value of a digital signal input increases, the voltage after D/A conversion increases proportionally. Generating a high voltage within a predetermined time using a current/voltage conversion resistor requires a great amount of current. The standard specification determines an amount of reference current so that a conversion voltage can be generated within a predetermined time even in the case of data input at an upper limit of the dynamic range of the D/A converter.
However, it is extremely rare that data near an upper limit of the dynamic range of the D/A converter is actually input except the case where a communication apparatus is used for a special purpose. Therefore, if there is obviously no high level input, reducing the amount of reference current produces no problem. That is, with low level input, it is possible to generate a conversion voltage within a predetermined time even if the amount of reference current is reduced.
Thus, for example, a circuit condition in a low consumption mode is set and the amount of reference current reduced at factory settings. It is possible to reduce the amount of reference current by appropriately combining a change of the size of MOS transistors, replacement of fixed resistors with variable resistors or modification of input data.
An embodiment of the present invention, for example, cuts a current that flows through a current mirror by half to reduce the operating current of the D/A converter to a half. On the other hand, it doubles the resistance of the current/voltage conversion resistor (variable resistor) to generate a predetermined conversion voltage. Instead of doubling the resistance value, it is also possible to apply shift processing to an input digital value to compensate the amount of current reduced.
Another embodiment of the present invention reduces the amount of operating current by turning OFF unnecessary current cells.